The invention relates generally to a method of erasing a flash memory device, and more particularly to, a method of erasing a flash memory device in which erase can be performed on a byte or word basis, in such a maimer that erase is allowed via the source by applying a negative voltage to a control gate and applying a high voltage to a select gate but the erase is not allowed if the select gate becomes a low voltage.
EEPROM is a volatile memory device to which program or erase can be performed on a byte or word basis, wherein a cell requires two transistors, as shown in FIG. 1. In other words, the drain terminal of the EEPROM cell and the source terminal of the NMOS transistor are connected each other, the drain terminal of the NMOS transistor is connected to the bit line and the gate terminal is connected to the word line. The reason why the cell is formed of two transistors connected each other is that neighboring cells not selected are not affected when the selected cell is erased. Thus, as the EEPROM cell has two transistors, the layout area of the EEPROM cell having two transistors must be twice greater than that of the cell that is formed by one transistor.
In order to supplement this drawback, there has been proposed a flash memory device having one transistor in the cell. However, the flash memory device performs the erase operation on a block basis and performs the program operation on a byte or word basis, by dividing their chips into various blocks having uniform sizes (or different sizes) in order to store data in the cell. Thus, as the flash memory cell uses only one transistor in the cell compared to the conventional EEPROM cell having two transistors, the layout area of the cell can be reduced to half.
However, there is a problem that the flash memory device could not be erased on a byte or word basis.
It is therefore an object of the present invention to provide a method of erasing a flash memory device capable of performing an erase operation on a byte or word basis.
In order to accomplish the above object, a method of erasing a flash memory device having a source, a drain, a floating gate, a control gate and a select gate according to the present invention is characterized in that the method performs an erase operation on a byte or word basis, in such a manner that a high negative voltage is applied to the control gate, a high positive voltage is applied to the select gate, the power supply is applied to the source and the drain is made floating, in a selected cell, and a high negative voltage is applied to the control gate, a voltage of 0V is applied to the select gate, the power supply is applied to the source and the drain is made floating or a voltage of 0V is applied to the control gate, a high positive voltage is applied to the select gate, and the source and drain are made floating, in a cell not selected.